A read transaction allocates a cache line, unless already allocated, when the read Allocation bit is set for a Write-Back configuration. A cache line remains allocated regardless of the read transaction properties.
Similarly a write transaction allocates a cache line if the Write Allocate bit is set, unless already allocated. A write to an already allocated line remains allocated if at least one of the Allocate bits is set, as well as Bufferable and Modifiable, otherwise the cache line is deallocated. The new data and any dirty data in the cache line is written downstream.
A Write Miss with Allocate enabled always fetches the entire cache line from a downstream cache or memory before merging the new data into the cache line. Additional transactions to this cache line will stall until the merge has completed.