The majority of the AXI Ethernet Lite MAC operation functions in the processor bus clock domain. This clock must be ≥ 100 MHz to transmit and receive Ethernet data at 100 Mb/s and ≥ 10 MHz to transmit and receive Ethernet data at 10 Mb/s.
The majority of the AXI Ethernet Lite MAC operation functions in the processor bus clock domain. This clock must be ≥ 100 MHz to transmit and receive Ethernet data at 100 Mb/s and ≥ 10 MHz to transmit and receive Ethernet data at 10 Mb/s.