MDIO Read Data Register (MDIORD) - 3.0 English

AXI Ethernet Lite MAC LogiCORE IP Product Guide (PG135)

Document ID
PG135
Release Date
2021-11-02
Version
3.0 English

The MDIORD is a 32-bit read/write register ( This Figure ). This register contains 16-bit read data from the PHY register. The bit definition of this register is shown in Table: MDIO Read Data Register (0x07EC) .

Figure 2-14: MDIO Read Data Register

X-Ref Target - Figure 2-14

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Table 2-16: MDIO Read Data Register (0x07EC)

Bits

Name

Access

Reset Value

Description

31:16

Reserved

N/A

N/A

Reserved

15:0

Read Data

Read

0

MDIO read data from the PHY register