The AXI4-Stream transmit signal ports are described in the following table.
Signal Name | Direction | Description |
---|---|---|
axis_clk | In | AXI4-Stream clock for TXD RXD TXC and RXS interfaces. |
axi_str_txd_aresetn | In | AXI4-Stream Transmit Data Reset. See Resets. |
axi_str_txd_tvalid | In | AXI4-Stream Transmit Data Valid. |
axi_str_txd_tready | Out | AXI4-Stream Transmit Data Ready. |
axi_str_txd_tlast | In | AXI4-Stream Transmit Data Last Word. |
axi_str_txd_tkeep[3:0] | In | AXI4-Stream Transmit Data Valid Strobes. |
axi_str_txd_tdata[31:0] | In | AXI4-Stream Transmit Data bus. |
axi_str_txc_aresetn | In | AXI4-Stream Transmit Control Reset. See Resets. |
axi_str_txc_tvalid | In | AXI4-Stream Transmit Control Valid. |
axi_str_txc_tready | Out | AXI4-Stream Transmit Control Ready. |
axi_str_txc_tlast | In | AXI4-Stream Transmit Control Last Word. |
axi_str_txc_tkeep[3:0] | In | AXI4-Stream Transmit Control Valid Strobes. |
axi_str_txc_tdata[31:0] | In | AXI4-Stream Transmit Control bus. |