In addition to the features listed in Features, the subsystem includes the following features:
- Full-duplex support (Half-duplex is not supported)
- IEEE 1588 Support:
- 1000BASE-X and SGMII PHY timestamping for 1G and 2.5G modes of operation
- Supports optional 1588 hardware timestamping for one-step and two-step when enabled with 1000BASE-X/SGMII PHY targeting AMD Versal™ Adaptive SoC with GTY/GTYP transceivers, AMD UltraScale™ /AMD UltraScale+™ FPGAs with GTH and GTY transceivers, and 7 series FPGAs with GTX and GTH transceivers
- The system timer provided to the subsystem and the
consequential timestamping taken from it are
available in one of two formats which are selected
during subsystem generation
- Time-of-Day (ToD) format: IEEE 1588-2008 format consisting of a 48-bit second field and a 32-bit nanosecond field
- Correction Field format: IEEE 1588-2008 numerical format consisting of a 64-bit field representing nanoseconds multiplied by 216 (see IEEE 1588 clause 13.3.2.7)
- Option to omit I/O cells in GMII mode
- Optional support for jumbo frames up to 16 KB
- Optional TX and RX Transmission Control Protocol/ User Datagram Protocol (TCP/UDP) partial checksum offload
- Optional IPv4 TX and RX TCP/UDP full checksum offload
- Support for VLAN frames
- Optional TX and RX VLAN tagging, stripping, and translation
- Independent 4 K, 8 K, 16 K, or 32 KB TX and RX frame buffer memory
- Optional extended filtering for multicast frames
- Optional TX and RX statistics gathering
- Auto PAD and frame check sequence (FCS) field insertion or pass through on transmit
- Auto PAD and FCS field stripping or pass through on receive
- Ethernet Audio Video Bridging (AVB) at 100/1000 Mbps (Additional license required)
- Filtering of bad receive frames
- Option to include or exclude shareable logic resources in the subsystem
- Optional support for board-based I/O constraints generation
- Support for 1000BASE-X and SGMII over Select Input/Output (I/O) Low Voltage Differential Signaling (LVDS) for UltraScale/UltraScale+. For Versal Adaptive SoC the Async 1000BASE-X and SGMII over LVDS support is with the Advanced I/O Wizard IP integration. Refer to the 1G Core Family Support table in the 1G/2.5G Ethernet PCS/PMA or SGMII LogiCORE IP Product Guide (PG047) for the list of supported devices.