IEEE 1588 Transmit Timestamp Ports - 7.2 English

AXI 1G/2.5G Ethernet Subsystem Product Guide (PG138)
Document ID
PG138
Release Date
2023-11-15
Version
7.2 English

The captured timestamp is always presented out-of-band for 1-step and 2-step frame transmission, using a dedicated AXI4-Stream interface. The signal is defined in the following table.

The following figure shows a timing diagram showing the operation of this interface.

Table 1. IEEE 1588 AXI4-Stream Interface Ports - Transmit 2-Step Timestamp
Name Direction Description
m_axis_tx_ts_data[127:0] Out

Bits[31:0] – Captured Timestamp Nanoseconds field.

Bits[79:32] – Captured Timestamp Seconds field.

Bits[95:80] – Original 16-bit Tag Field for the frame (from the Tag Field of the Command Field for the frame sent for transmission).

Bits[127:96] – Reserved.
m_axis_tx_ts_tvalid Out AXI4-Stream Transmit Timestamp Data Valid from the Ethernet MAC.
Figure 1. Transmit 2-step Timestamp AXI Ethernet Page-1 Sheet.42 Sheet.43 Sheet.44 Sheet.45 Sheet.53 Sheet.54 Sheet.56 Sheet.57 Sheet.61 Sheet.64 tx_mac_clk tx_mac_clk Sheet.65 Sheet.66 tx_ts_axis_tvalid tx_ts_axis_tvalid Sheet.67 tx_ts_axis_tdata[79:0] tx_ts_axis_tdata[79:0] Sheet.68 Sheet.69 Sheet.70 Sheet.71 Sheet.72 Sheet.73 Sheet.74 TS TS Sheet.75 TAG TAG Sheet.76 tx_ts_axis_tdata[95:80] tx_ts_axis_tdata[95:80] Sheet.77 X15632-082817 X15632-082817