Port Descriptions - 7.2 English

AXI 1G/2.5G Ethernet Subsystem Product Guide (PG138)

Document ID
PG138
Release Date
2023-11-15
Version
7.2 English

The subsystem ports depend on the mode of operation. These ports are grouped into interfaces based on their functionality. These interfaces have associated clock and reset ports. The details of the interfaces are given in the following table.

Table 1. I/O Interfaces
Interface Name Description
s_axi AXI4-Lite interface used to configure the AXI Ethernet Subsystem. In processor mode, this interface maps to the AXI Ethernet buffer which configures the TEMAC. In non-processor mode, this interface maps to and directly configures the TEMAC.
s_axis_txc AXI4-Stream Transmit Control.
s_axis_txd AXI4-Stream Transmit Data.
m_axis_rxd AXI4-Stream Receive Data.
m_axis_rxs AXI4-Stream Receive Status.
s_axis_tx_av AXI4-Stream AVB Transmit Data. This interface is present only in AVB mode.
m_axis_rx_av AXI4-Stream AVB Receive Data. This interface is present only in AVB mode.
mdio MDIO interface to configure PHY. This interface is present in MII, GMII, RGMII and SGMII modes.
mii Media Independent Interface. This interface is present only in MII mode.
gmii Gigabit Media Independent Interface. This interface is present only in GMII mode.
rgmii Reduced Gigabit Media Independent Interface. This interface is present only in RGMII mode.
sgmii Serial Gigabit Media Independent Interface. This interface is present only in SGMII mode.
sfp In 1000BASE-X mode, this interface connects to the SFP cage. This interface is present only in 1000BASE-X mode.
mgt_clk Differential clock input for the serial transceiver. This interface is present only in Shared Logic in Subsystem configuration in SGMII or 1000BASE-X modes.

Details of all the I/O signals that are included in this table and other individual signals are provided in the following sections.