The subsystem contains memory and addressable registers for read and write operations as shown in the following table. All registers are directly accessible using a single AXI4-Lite interface. The base address is computed in the Vivado IP integrator system during the creation of the system. All the registers addresses mentioned here are offset from the base address. The address space from 0x34 to 0x3FFF belongs to the TEMAC. A few registers from the TEMAC are briefly mentioned here for ease of use. See the Tri-Mode Ethernet MAC LogiCORE IP Product Guide (PG051). for more information related to these registers. All reserved address spaces indicated in the following table return zeros when read.
In through , R/W stands for read/write and RO stands for read only.
| Register Name | AXI4-Lite Address (offset from C_BASEADDR) | Access |
|---|---|---|
| Reset and Address Filter TEMAC (RAF) | 0x00000000 1 | R/W |
| Transmit Pause Frame TEMAC (TPF) | 0x00000004 1 | R/W |
| Transmit Inter Frame Gap Adjustment TEMAC (IFGP) | 0x0000000 1 | R/W |
| Interrupt Status (IS) | 0x0000000C 1 | R/W |
| Interrupt Pending (IP) | 0x00000010 1 | RO |
| Interrupt Enable (IE) | 0x00000014 1 | R/W |
| Transmit VLAN Tag TEMAC (TTAG) | 0x00000018 1 | R/W |
| Receive VLAN Tag TEMAC (RTAG) | 0x0000001C 1 | R/W |
| Unicast Address Word Lower TEMAC (UAWL) | 0x00000020 1 | R/W |
| Unicast Address Word Upper TEMAC (UAWU) | 0x00000024 1 | R/W |
| VLAN TPID TEMAC Word 0 (TPID0) | 0x00000028 1 | R/W |
| VLAN TPID TEMAC Word 1 (TPID1) | 0x0000002C 1 | R/W |
| PCS PMA TEMAC Status (PPST) | 0x00000030 1 | RO |
| Reserved | 0x00000034 1 –0x000001FC | Reserved |
| Statistics Counters | 0x00000200–0x000003FC | RO |
| TEMAC Receive Configuration Word 0 (RCW) | 0x00000400 | R/W |
| TEMAC Receive Configuration Word 1 (RCW) | 0x00000404 | R/W |
| TEMAC Transmitter Configuration (TC) | 0x00000408 | R/W |
| TEMAC Flow Control Configuration (FCC) | 0x0000040C | R/W |
| TEMAC Speed Configuration | 0x00000410 | R/W |
| RX Max Frame Configuration | 0x00000414 | R/W |
| TX Max Frame Configuration | 0x00000418 | R/W |
| TX Timestamp Adjust Control | 0x0000041C | R/W |
| Reserved | 0x00000424–0x000004F4 | Reserved |
| Identification | 0x000004F8 | RO |
| Ability Register | 0x000004FC | RO |
| MDIO Setup | 0x00000500 | R/W |
| MDIO Control | 0x00000504 | R/W |
| MDIO Write Data | 0x00000508 | R/W |
| MDIO Read Data | 0x0000050C | RO |
| Reserved | 0x00000510–0x000005FC | Reserved |
| Interrupt Status (TEMAC) | 0x00000600 | R/W |
| Reserved | 0x00000604–0x0000060C | Reserved |
| Interrupt Pending (TEMAC) | 0x00000610 | RO |
| Reserved | 0x00000614–0x0000061C | Reserved |
| Interrupt Enable (TEMAC) | 0x00000620 | R/W |
| Reserved | 0x00000624–0x0000062C | Reserved |
| Interrupt Clear (TEMAC) | 0x00000630 | R/W |
| Reserved | 0x00000634–0x000006FC | Reserved |
| Unicast Address Word 0 (UAW0) | 0x00000700 | R/W |
| Unicast Address Word 1 (UAW1) | 0x00000704 | R/W |
| Frame Filter Control | 0x00000708 | R/W |
| Frame Filter Enable | 0x0000070C | Reserved |
| Frame Filter Value | 0x00000710-0x0000074C | R/W |
| Frame Filter Mask Value | 0x00000750–0x0000078C | R/W |
| Reserved | 0x00000790–0x00000FFC | Reserved |
| Reserved | 0x00001000–0x00003FFC | Reserved |
| Transmit VLAN Data Table TEMAC | 0x00004000–0x00007FFC 1 | R/W |
| Receive VLAN Data Table TEMAC | 0x00008000–0x0000BFFC | R/W |
| Reserved | 0x0000C000–0x0000FFFC | Reserved |
| Ethernet AVB | 0x00010000–0x00013FFC | R/W |
| Reserved | 0x00014000–0x0001FFFC | Reserved |
| Multicast Address Table TEMAC | 0x00020000–0x0003FFFC 1 | R/W |
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