The Transmit Pause Frame (TPF) TEMAC register is shown in the following table. This register provides a value of pause when enabled by the FCC register (TEMAC Flow Control Configuration Register). When enabled, the Ethernet transmits a pause frame whenever this register is written. Pause values are defined in units of pause quanta which are defined as 512-bit times for the current transmission speed. Therefore, pause times can have values ranging from 0 to 65,535 x 512-bit times.
Figure 1. Transmit Pause Frame Register (0x0000_0004)
The following table shows the Transmit Pause Frame register bit definitions.
| Bits | Name | Access | Reset Value | Description |
|---|---|---|---|---|
| 31:16 | Reserved | RO | 0x0 | Reserved: These bits are reserved for future use and always return zero. |
| 15:0 | TPFV | R/W | 0x0 | Transmit Pause Frame Value: These bits denote the value of the transmit pause frame pause time in units of 512 bit times. If enabled by the FCC register, writing a value into this register initiates the transmission of a single pause frame with the pause value defined in this field. |