VCU118/KCU116 Board - 7.2 English

AXI 1G/2.5G Ethernet Subsystem Product Guide (PG138)

Document ID
PG138
Release Date
2023-11-15
Version
7.2 English

The VCU118 and KCU116 boards with on-board TI PHY support are added for SGMII over LVDS configuration.

In the case of the VCU118 board, the SGMII over LVDS mode has the MGT CLOCK which is provided by the on-board TI PHY at 625 MHz. Also, the on-board PHY receives the reset from the FPGA. The other I/O ports are assigned with the LEDs, DIP switches, and push button switches available in the VCU118 board. DIP switch for control_data functions are the same as described in the previous table.