The rx_client_fifo is built around a
dual-port inferred RAM giving a total memory capacity of 4,096 bytes. The receive FIFO writes
data received through the TEMAC core. If not errored, the frame is presented on the AXI4-Stream FIFO interface to be read by the basic_pat_gen
module. If the frame is errored, it is dropped by the receive FIFO. If the receive FIFO memory
overflows, the frame currently being received is dropped.
The FIFO can overflow if the receiver clock is running at a faster rate than the transmitter clock or if the inter-packet gap between the received frames is smaller than the interpacket gap between the transmitted frames. In this case, the TX FIFO is unable to read data from the RX FIFO as fast as it is being received.
The FIFO size of 4,096 bytes limits the size of the frames that it can store without error. If a frame is larger than 4,000 bytes, the FIFO can overflow causing lost data. It is therefore recommended that the example design should not be used with the TEMAC solution in jumbo frame mode for frames of larger than 4,000 bytes.