DSP Slice Column Options - 7.2 English

FIR Compiler (PG149)

Document ID
PG149
Release Date
2022-10-26
Version
7.2 English

The Vivado IDE displays the number of independent DSP chains, and their length, required to build the specified filter configuration.

Multi-column Support : Implementations of large high speed filters might require chaining of DSP slice elements across multiple DSP columns. Where applicable (the feature is only enabled for multi-column devices), you can select the method of folding of the filter structure across the multiple columns, which can be Automatic (based on the selected device for the project) or Custom (you specify the length of each column). Multiple Column Filter Implementation describes the multi-column implementation in more detail.

Device Column Lengths : Displays the column length pattern in a comma delimited list for the selected project device.

Available Column Lengths : Displays the column length pattern available for a single DSP chain. The GUI reduces the Device Columns Lengths given the number of independent DSP chains required by the filter configuration. The generated column pattern considers the Optimization Goal specified.

Column Configuration : Specifies the individual column lengths, in a comma delimited list, that implement a single DSP chain. When Automatic has been selected, the column lengths are determined by the GUI starting with the first column in the available column pattern. When Custom is selected, you can specify the desired column pattern. The number and length of the columns cannot exceed the available column pattern and the column lengths must sum to the DSP chain length. When the available columns have various lengths, it might be desirable to skip a particular column; this can be done by specifying a zero column length, for example 10,0,22. The specified column configuration does not guarantee that the downstream tools place the columns in the desired sequence.

Inter-column Pipe Length : Pipeline stages are required to connect between the columns (Non-symmetric filter implementations only), with the level of pipelining required being dependent upon the required system clock rate, the chosen device, and other system-level parameters. Choice of this parameter is always left for you to specify.