• TLAST : tlast can either be Not Required, Vector Framing or Packet Framing. Selecting Not Required means that the core does not have the port; selecting Vector Framing means that tlast is expected to denote the last sample of an interleaved cycle of data channels; selecting Packet Framing means that the core does not interpret tlast , but passes the signal to the output DATA channel tlast with the same latency as the datapath.
• Output TREADY : This field enables the m_axis_data_tready port. With this port enabled, the core supports back-pressure. Without the port, back-pressure is not supported, but resources are saved and performance is likely to be higher.
• Input FIFO : Selects a FIFO interface for the S_AXIS_DATA channel. When the FIFO has been selected data can be transferred in a continuous burst up to the size of the FIFO (default 16) or, if greater, the number of interleaved data channels. The FIFO requires additional FPGA logic resources.
• TUSER Input : The input TUSER port can independently and optionally convey a User Field and/or a Chan ID Field, giving four options.
• TUSER Output : The output TUSER port can optionally carry a User Field and/or a Chan ID Field. The presence of a User field in this port is coupled to the presence of a User Field in the TUSER input selection, because the User Field, if present, is not interpreted by the core, but conveyed from input DATA channel to Output Channel with the same latency as the datapath to ease system design.
• User Field Width : Range 1 to 256 bits. This parameter is automatically set in IP integrator but can also be overridden.
See TUSER Options of the Input and Output DATA Channels for further details.