Integer Rate Change - 7.2 English

FIR Compiler (PG149)

Document ID
PG149
Release Date
2022-10-26
Version
7.2 English

For filters with an integer rate change the core accepts input samples at fixed intervals and produces an output that has a fixed sample period. A decimation by 3 filter with an input sampling frequency of 50 MHz and a clock frequency of 200 MHz has an input sample period of 4 clocks cycles and an output sample period of 12 clock cycles.

The exception to this is interpolating filters with a rate change that when divided into the input sample period leaves a non-zero remainder; for example, an interpolation by 3 filter with an input sampling frequency of 25 MHz and a clock frequency of 200 MHz. The input sample period is 8 but the output sample period should be 2.666…7. In this circumstance the core generates the interpolated output samples with a period of 2 but following the final interpolated output sample there is an additional 2 clock cycles where no outputs are produced. This generates 3 output samples for every 8 clock cycles and an effective sample rate of 2.666…7 clock cycles.