Output Rounding - 7.2 English

FIR Compiler (PG149)

Document ID
PG149
Release Date
2022-10-26
Version
7.2 English

As mentioned in Symmetric Rounding to Highest Magnitude , it is desirable to limit the output sample width of the filter to minimize resource utilization in downstream blocks in a signal processing chain. For MAC implementations the FIR Compiler includes features to limit the output sample width and round the result to the nearest representable number within that bit width. Several rounding modes are provided to allow you to select the preferred trade-off between resource utilization, rounding precision, and rounding bias.

In the following descriptions, the variable x is the fractional number to be rounded, with n representing the output width (that is, the integer bits of the accumulator result) and m representing the truncated LSBs (that is, the difference between the accumulator width and the output width). In This Figure through This Figure , the direction of inflexion on the red midpoint markers indicates the direction of rounding.