Systolic Multiply-Accumulate - 7.2 English

This Figure shows the Systolic Multiply-Accumulate architecture implementing a pipelined Direct-Form filter.

Figure 3-9: Pipelined Direct - Form

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This Figure shows a multi-MAC implementation for this architecture.

Figure 3-10: Systolic Multi - MAC Implementation

X-Ref Target - Figure 3-10

The architecture is directly supported by the DSP Slice and results in area-efficient and high performance filter implementations. The structure also extends to exploit coefficient symmetry, thus providing further resource savings.