Transpose Multiply-Accumulate - 7.2 English

FIR Compiler (PG149)

Document ID
PG149
Release Date
2022-10-26
Version
7.2 English

This Figure shows the Transpose Multiply-Accumulate architecture implementing a Transposed Direct-Form filter.

Figure 3-11: Transpose Direct - Form

X-Ref Target - Figure 3-11

transpose_direct_pg26_pg149.jpg

This Figure shows a multi-MAC implementation for this architecture.

Figure 3-12: Transpose Multi - MAC Implementation

X-Ref Target - Figure 3-12

transpose_multi_pg27_pg149.jpg

This architecture is also directly supported by the DSP Slice. This structure offers a low latency implementation, and for some configurations can also offer extra resource savings over the Systolic structure. It does not require an accumulator and can use fewer data memory resources, although it does not exploit coefficient symmetry.