AXI4 Interface - 3.2 English

PG153 AXI Quad SPI Product Guide

Document ID
PG153
Release Date
2022-04-26
Version
3.2 English

The AXI4 interface is included when the Enable Performance Mode option is selected. In this mode, the core can be operated in enhanced mode (Enable XIP Mode is not selected) or XIP mode (Enable XIP Mode is selected). In performance mode, the AXI4 interface is used for burst transactions at the DTR and DRR locations.