For full details about performance and resource utilization, visit the Performance and Resource Utilization web page.
The performance characterization of this core was compiled using the margin system methodology. The details of the margin system characterization methodology are described in the Vivado Design Suite User Guide: Designing With IP (UG896) [Ref 2].
Note: Performance for Zynq®-7000 SoC and UltraScale™ devices is similar to 7 series devices.
The performance characterization was compiled for these families.
The maximum frequencies for the AXI Quad SPI core are shown in Table: AXI Quad SPI Maximum Frequencies.
Note: For xip and standard modes, ext_spi_clk may be limited to 60 MHz.
Note: UltraScale™ device frequency numbers are expected to be similar to 7 series numbers.
Note: The frequencies mentioned in the above table are specific to legacy SPI x 1 mode. They vary if we change the mode and other settings.