The Xilinx simulation libraries must be mapped to the simulator. To set up the Xilinx simulation models, see the Vivado Design Suite User Guide: Logic Simulation (UG900) [Ref 7]. To switch simulators, click Simulation Settings in the Flow Navigator (left pane). In the Simulation options list, change Target Simulator.
The example design supports functional (behavioral) and post-synthesis simulations. For information how to run simulation, see the Vivado Design Suite User Guide: Logic Simulation (UG900) [Ref 7].
The simulation script compiles the AXI Quad SPI example design, and supporting simulation files. It then runs the simulation and checks that it completed successfully.
If the test passes, the following message is displayed:
Test Completed Successfully
If the test hangs, the following message is displayed.
If the test fails, the following message is displayed.