Block Diagram - 3.6 English

7 Series FPGAs Transceivers Wizard (PG168)

Document ID

PG168

Release Date

2022-05-19

Version

3.6 English

This Figure shows a 7 series FPGAs Transceivers Wizard example design using the legacy core.

Figure B-1: Legacy Example Design
X-Ref Target - Figure B-1

This Figure is the 7 series FPGAs Transceivers Wizard v3.4 example design generated with the include Shared Logic in example design option selected in the GUI.

Figure B-2: Shared Logic in Example Design
X-Ref Target - Figure B-2

This Figure is the 7 series FPGAs Transceivers Wizard v3.4 example design generated with the include Shared Logic in core option selected in the GUI.

Figure B-3: Shared Logic in Core
X-Ref Target - Figure B-3