Clock-correction Testing - 3.6 English

7 Series FPGAs Transceivers Wizard (PG168)

Document ID
PG168
Release Date
2022-05-19
Version
3.6 English

This tests all possible combinations of clock-correction in all decoding schemes (Table: Combinations of Clock-correction).

Table C-11:      Combinations of Clock-correction

Decoding type

CB Sequence No

Sequence Length

CC Sequence

Periodicity

10B8B decoding

1 or 2

1 or 2 or 4

User defined

User defined

None

1 or 2

1 or 2 or 4

User defined

User defined

None_MSB_first

1 or 2

1 or 2 or 4

User defined

User defined

66B64B

NA

NA

NA

NA

67B64B

NA

NA

NA

NA