Introduction - 3.6 English

7 Series FPGAs Transceivers Wizard (PG168)

Document ID
PG168
Release Date
2022-05-19
Version
3.6 English

The 7 series FPGAs Transceivers Wizard LogiCORE™ IP automates the task of creating HDL wrappers to configure Xilinx® 7 series FPGA on-chip transceivers. The wizard customization Vivado® Integrated Design Environment (IDE) allows you to configure one or more high-speed serial transceivers using either pre-defined templates supporting popular industry standards, or from scratch to support a wide variety of custom protocols.

IMPORTANT:   Download the most up-to-date IP update before using the Wizard.