This directory contains the example design top module and reset logic module.
|
Name |
Description |
|---|---|
|
gt_frame_check.v[hd] |
Frame check logic to be instantiated in the example design. |
|
gt_frame_gen.v[hd] |
Frame generator logic to be instantiated in the example design. |
|
<component_name>_exdes.v[hd] |
Top-level example design. Contains transceiver, reset logic, and instantiations for frame generator and frame check logic. Also contains Vivado Design Suite debug feature Pro module instantiations. |
|
gt_rom_init_tx.dat |
Block RAM initialization pattern for gt_frame_gen module. The pattern is user modifiable. |
|
gt_rom_init_rx.dat |
Block RAM initialization pattern for gt_frame_check module. The pattern is user modifiable. |