Error Correction Latency - 3.1 English

UltraScale Architecture Soft Error Mitigation Controller LogiCORE IP Product Guide (PG187)

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3.1 English

After detecting an error, the solution attempts correction. Errors are correctable depending on the selected correction mode and error type. The following table provides error correction latency for a configuration frame upset, assuming no throttling on the Monitor Interface.

Table 1. Error Correction Latency, No Throttling on Monitor Interface
Device Correction Mode Correctability Error Correction Latency at ICAP_FMax (µs)
UltraScale Repair Correctable 1 41 2
Uncorrectable 21 2
Any CRC-only (Uncorrectable) 9
UltraScale+ Monolithic Repair Correctable 1 44 3
Uncorrectable 22 3
Any CRC-only (Uncorrectable) 9
UltraScale+ SSI Repair Correctable 1 99 4
Uncorrectable 38 4
Any CRC-only (Uncorrectable) 15
  1. IP could correct up to four bits of error in frame depending on its physical adjacency.
  2. Measured in hardware for XCKU040 device.
  3. Measured in hardware for XCVU3P device.
  4. Measured in hardware for XCVU9P device.

The error correction latency at the actual frequency of operation can be estimated using data from the previous table and the following equation.

Figure 1. Correction Latency