Synthesis and Implementation - 3.1 English

UltraScale Architecture Soft Error Mitigation Controller LogiCORE IP Product Guide (PG187)

Document ID
PG187
Release Date
2023-11-08
Version
3.1 English

The SEM core should be synthesized and implemented with the provided example design. For more details, see Implementation.

For details about synthesis and implementation using the Vivado Design Suite, see the Vivado Design Suite User Guide: Designing with IP (UG896).