AXI Bridge for PCIe Gen3 MSI Signals - 3.0 English

AXI Bridge for PCI Express Gen3 Subsystem Product Guide (PG194)

Document ID
PG194
Release Date
2022-11-16
Version
3.0 English
Table 1. AXI Bridge for PCIe Gen3 MSI Signals
Signal Name I/O Description
intx_msi_request I Legacy interrupt input (see pf0_interrupt_pin) when msi_enable = 0.

Initiates a MSI write request when msi_enable = 1.

intx_msi_request is asserted for one clock period.

intx_msi_grant O Indicates legacy interrupt/MSI grant signal. The intx_msi_grant signal is asserted for one clock period when the interrupt is accepted by the PCIe core.
msi_enable O Indicates when MSI is enabled.
msi_vector_num [4:0] I Indicates MSI vector to send when writing a MSI write request.
msi_vector_width [2:0] O Indicates the size of the MSI field (the number of MSI vectors allocated to the device).