Example Figures - 3.0 English

AXI Bridge for PCI Express Gen3 Subsystem Product Guide (PG194)

Document ID
PG194
Release Date
2022-11-16
Version
3.0 English

The following figuren shows how the CCIX RX core interface transfers data based on available credits from the user application. The interface will deassert ccix_rx_valid for a TLP that is in the process of being presented, because it has no credit available. The core takes one user clock cycle to restart the TLP presentation after the user application sends a credit.

Figure 1. CCIX RX Core Interface

The following figure shows the requirements of the user application on the Transmit CCIX core interface, when the ccix_tx_valid signal is deasserted during presentation of a TLP packet (option 1).

Figure 2. CCIX PCIe TX interface - Option 1

The following figure shows options 2, where the user accumulates enough credits before transmitting the TLP packet, which ensures that the user does not need to deassert ccix_tx_valid during the presentation of the TLP.

Figure 3. CCIX PCIe TX interface - Option 2