The example designs are as follows:
- AXI4 Memory Mapped Default Example Design
- AXI4 Memory Mapped with PCIe to AXI4-Lite Master and PCIe to DMA Bypass Example Design
- AXI4 Memory Mapped with AXI4-Lite Slave Interface Example Design
- AXI4-Stream Example Design
- AXI4 Memory Mapped with Descriptor Bypass Example
- Vivado IP Integrator-Based Example Design
- User IRQ Example Design