C2H SGDMA Descriptor Low Address (0x80) - 4.1 English

DMA/Bridge Subsystem for PCI Express Product Guide (PG195)

Document ID
PG195
Release Date
2023-11-24
Version
4.1 English
Table 1. C2H SGDMA Descriptor Low Address (0x80)
Bit Index Default Access Type Description
31:0 32’h0 RW

dsc_adr[31:0]

Lower bits of start descriptor address. Dsc_adr[63:0] is the first descriptor address that is fetched after the Control register Run bit is set.