Config Block PCIE Data Width (0x18) - 4.1 English

DMA/Bridge Subsystem for PCI Express Product Guide (PG195)
Document ID
PG195
Release Date
2023-11-24
Version
4.1 English
Table 1. Config Block PCIE Data Width (0x18)
Bit Index Default Access Type Description
[2:0] C_DAT_WIDTH RO

pcie_width

PCIe AXI4-Stream Width

0: 64 bits

1: 128 bits

2: 256 bits

3: 512 bits