GT Settings Tab - 4.1 English

DMA/Bridge Subsystem for PCI Express Product Guide (PG195)
Document ID
PG195
Release Date
2023-11-24
Version
4.1 English

The GT Settings tab is shown in the following figure.

Figure 1. GT Settings Tab
For a description of these options, see Chapter 4, “Design Flow Steps” in the respective product guide listed below:
  • 7 Series FPGAs Integrated Block for PCI Express LogiCORE IP Product Guide (PG054)
  • UltraScale Devices Gen3 Integrated Block for PCI Express LogiCORE IP Product Guide (PG156)
  • UltraScale+ Devices Integrated Block for PCI Express LogiCORE IP Product Guide (PG213)