H2C SGDMA Descriptor Credits (0x8C) - 4.1 English

DMA/Bridge Subsystem for PCI Express Product Guide (PG195)

Document ID
PG195
Release Date
2023-11-24
Version
4.1 English
Table 1. H2C SGDMA Descriptor Credits (0x8C)
Bit Index Default Access Type Description
9:0 10'h0 RW

h2c_dsc_credit[9:0]

Writes to this register will add descriptor credits for the channel. This register will only be used if it is enabled via the channel's bits in the Descriptor Credit Mode register.

Credits are automatically cleared on the falling edge of the channels Control register Run bit or if Descriptor Credit Mode is disabled for the channel. The register can be read to determine the number of current remaining credits for the channel.