Multi-Channels Simulation, Example Channel 1 H2C and C2H - 4.1 English

1. Create an H2C Channel 1 descriptor in the Host memory address that is different than the H2C and C2H Channel 0 descriptor.
2. Create a C2H Channel 1 descriptor in the Host memory address that is different than the H2C and C2H Channel 0 and H2C Channel 1 descriptor.
3. Create transfer data (128 Bytes) for the H2C Channel 1 transfer in the Host memory which does not overwrite any of the 4 descriptors in the Host memory (H2C and C2H Channel 0 and Channel 1 descriptors), and H2C Channel 0 data.
4. Also make sure the H2C data in the Host memory does not overlap the C2H data transfer space for both C2H Channel 0 and 1.
5. Write the descriptor starting address to H2C Channel 0 and 1. Write to H2C SGDMA Descriptor Low Address (0x80) and H2C SGDMA Descriptor High Address (0x84) registers.
6. Write the descriptor starting address to C2H Channel 0 and 1. Write to C2H SGDMA Descriptor Low Address (0x80) and H2C SGDMA Descriptor High Address (0x84) registers.
7. Enable multi-channel transfer by writing to control register (bit 0) of H2C Channel 0 and 1. Write to H2C Channel Control (0x04) register for Channel 0 and Channel 1.
8. Enable multi-channel transfer by writing to control register (bit 0) of C2H Channel 0 and 1. Write to C2H Channel Control (0x04) register for Channel 0 and Channel 1.
9. Compare the data for correctness.

The same procedure applies for AXI4-Stream configuration. Refer to the above section for detailed explanation of the AXI4-Stream transfer.