Others - 4.1 English

DMA/Bridge Subsystem for PCI Express Product Guide (PG195)

Document ID
PG195
Release Date
2023-11-24
Version
4.1 English
  • Only supports the INCR burst type. Other types result in a Slave Illegal Burst (SIB) interrupt.
  • No memory type support (AxCACHE)
  • No protection type support (AxPROT)
  • No lock type support (AxLOCK)
  • No non-contiguous byte enable support (WSTRB)
  • For 7 series Gen2 IP, PCIe access from the Host system must be limited to 1DW (4 Bytes) transaction only.
Note: Both AXI Bypass and Register access are limited by this restriction.