SGDMA Common Registers (0x6) - 4.1 English

DMA/Bridge Subsystem for PCI Express Product Guide (PG195)

Document ID
PG195
Release Date
2023-11-24
Version
4.1 English
Table 1. SGDMA Common Registers (0x6)
Address (hex) Register Name
0x00 SGDMA Identifier Registers (0x00)
0x10 SGDMA Descriptor Control Register (0x10)
0x14 SGDMA Descriptor Control Register (0x14)
0x18 SGDMA Descriptor Control Register (0x18)
0x20 SGDMA Descriptor Credit Mode Enable (0x20)
0x24 SG Descriptor Mode Enable Register (0x24)
0x28 SG Descriptor Mode Enable Register (0x28)