Test Tasks - 4.1 English

DMA/Bridge Subsystem for PCI Express Product Guide (PG195)

Document ID
PG195
Release Date
2023-11-24
Version
4.1 English
Table 1. Test Tasks
Name Description
TSK_INIT_DATA_H2C This task generates one descriptor for H2C engine and initializes source data in host memory.
TSK_INIT_DATA_C2H This task generates one descriptor for C2H engine.
TSK_XDMA_REG_READ This task reads the DMA Subsystem for PCIe register.
TSK_XDMA_REG_WRITE This task writes the DMA Subsystem for PCIe register.
COMPARE_DATA_H2C This task compares source data in the host memory to destination data written to block RAM. This task is used in AXI4 Memory Mapped simulation.
COMPARE_DATA_C2H

This task compares the original data in the host memory to the data C2H engine writing to host. This task is used in AXI4 Memory Mapped simulation.

TSK_XDMA_FIND_BAR

This task finds XDMA configuration space between different enabled BARs (BAR0 to BAR6).

For other PCIe-related tasks, see the “Test Bench” chapter in the 7 Series FPGAs Integrated Block for PCI Express LogiCORE IP Product Guide (PG054), Virtex-7 FPGA Integrated Block for PCI Express LogiCORE IP Product Guide (PG023), UltraScale Devices Gen3 Integrated Block for PCI Express LogiCORE IP Product Guide (PG156), or UltraScale+ Devices Integrated Block for PCI Express LogiCORE IP Product Guide (PG213).