Pin and Bank Rules - 4.3 English

MIPI D-PHY LogiCORE IP Product Guide (PG202)

Document ID
PG202
Release Date
2023-05-16
Version
4.3 English

This appendix provides guidelines and recommendations to implement multiple D-PHY interfaces on supported AMD devices.

For more information on pin and bank rules, see the Advanced I/O Wizard LogiCORE IP Product Guide (PG320).

Important: Pin swap functionality between P/N is not supported for any DPHY Lane.