CMAC with GTM Mapping - 3.1 English

UltraScale+ Devices Integrated 100G Ethernet Subsystem Product Guide (PG203)

Document ID
PG203
Release Date
2022-11-02
Version
3.1 English

The mapping between the 100G Ethernet IP with high speed GTM transceiver along with the clocking and reset modules are depicted in This Figure and This Figure .

Figure 3-3: CMAC Clock and Reset – 100GAUI-2 GTM with Transcode Configuration

X-Ref Target - Figure 3-3

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Figure 3-4: CMAC Clock and Reset – CAUI-4 GTM Configuration

X-Ref Target - Figure 3-4

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Figure 3-5: CMAC Clock and Reset – 100GAUI-4 GTM Configuration

X-Ref Target - Figure 3-5

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The supported GTM configurations for CMAC is shown in Table: Supported CMAC-GTM configurations .

Table 3-1: Supported CMAC-GTM configurations

Configuration

GTM Presets Used

Line Rate

(Gb/s)

GTM Data Encoding

GTM Data Width

100GAUI-2

GTM-PAM4_100GAUI_2

53.125

PAM4

160

CAUI-4

GTM-NRZ_CAUI_4

25.78125

NRZ

64

100GAUI-4

GTM-NRZ_100GAUI_4

26.5625

NRZ

64