• DRP addresses are different between the architectures. Refer to Table: DRP Map of the CMAC Block for the DRP address map for the Integrated 100G Ethernet MAC in UltraScale+ FPGAs.
• DRP addresses are different between the architectures. Refer to Table: DRP Map of the CMAC Block for the DRP address map for the Integrated 100G Ethernet MAC in UltraScale+ FPGAs.