Modifications - 3.1 English

UltraScale+ Devices Integrated 100G Ethernet Subsystem Product Guide (PG203)

Document ID
PG203
Release Date
2022-11-02
Version
3.1 English

DRP addresses are different between the architectures. Refer to Table: DRP Map of the CMAC Block for the DRP address map for the Integrated 100G Ethernet MAC in UltraScale+ FPGAs.