Normal Mode - 3.1 English

UltraScale+ Devices Integrated 100G Ethernet Subsystem Product Guide (PG203)

Document ID
PG203
Release Date
2022-11-02
Version
3.1 English

Because the ports used for data transfer between the RS-FEC engine and the SerDes are identical to those used by the Integrated 100G Ethernet, and the bypass control of the RS-FEC layer is performed within the 100G Ethernet integrated block, the inclusion of the RS-FEC functionality within the Ethernet subsystem is mostly transparent to the user in normal mode.

To enable the RS-FEC in normal mode, set the ctl_rx_rsfec_enable and ctl_tx_rsfec_enable inputs to 1, and set ctl_rsfec_enable_transcoder_bypass_mode to 0. Set the desired operating sub-mode on the ctl_rsfec_ieee_error_indication_mode , ctl_rx_rsfec_enable_correction and ctl_rx_rsfec_enable_indication inputs. The rx_reset and tx_reset must then be asserted and removed in order to apply the chosen settings.

In normal mode, all of the statistics outputs defined in Table: Common Ports are generated regardless of the chosen sub-mode.

The codeword statistics flags ( stat_rx_rsfec*_cw_inc ) output from the RS-FEC engine in normal mode should be interpreted as per Table: RS-FEC Engine in Normal Mode .

Note: If error correction is disabled, as in sub-modes 2 and 3, corrected codewords will never be seen.

The RS-FEC engine never generates the values in rows marked as "illegal".

Table A-5: RS-FEC Engine in Normal Mode

cw_inc

corrected_cw_inc

uncorrected_cw_inc

Description

0

0

0

No activity

0

0

1

Illegal

0

1

0

Illegal

0

1

1

Illegal

1

0

0

Codeword had no errors

1

0

1

Codeword had errors that were not corrected

1

1

0

Codeword had errors that were corrected

1

1

1

Illegal