Name
|
I/O
|
Clock Domain
|
Description
|
ctl_tx_max_packet_len[14:0]
|
I
|
clk
|
Any packet longer than this value is considered to be oversized. The allowed value for this bus can range from 64 to 16,383. ctl_rx_max_packet_len[14] is reserved and must be set to 0.
|
ctl_tx_min_packet_len[7:0]
|
I
|
clk
|
Any packet shorter than this value is considered to be undersized.
|
ctl_tx_check_sfd
|
I
|
clk
|
When asserted, this input causes the client monitor to check the start of frame delimiter of the egress frame.
|
ctl_tx_check_preamble
|
I
|
clk
|
When asserted, this input causes the client monitor to check the preamble of the egress frame.
|
ctl_tx_ignore_fcs
|
I
|
clk
|
Enable FCS error checking at the LBUS interface by the TX core. This input only has effect when ctl_tx_fcs_ins_enable is Low. If this input is Low and a packet with bad FCS is being transmitted, it is not binned as good. If this input is High, a packet with bad FCS is binned as good.
The error is flagged on the signals stat_tx_bad_fcs and stomped_fcs, and the packet is transmitted as it was received.
Note:
Statistics are reported as if there was no FCS error.
|
ctl_rsfec_enable
|
I
|
clk
|
This input is to enable the RS-FEC soft IP core inside the soft TX OTN RTL for TX path.
|
stat_tx_jabber
|
O
|
clk
|
Increment for packets longer than ctl_tx_max_packet_len with bad FCS.
|
stat_tx_oversize
|
O
|
clk
|
Increment for packets longer than ctl_tx_max_packet_len with good FCS.
|
stat_tx_undersize[1:0]
|
O
|
clk
|
Increment for packets shorter than ctl_tx_min_packet_len with good FCS.
|
stat_tx_toolong
|
O
|
clk
|
Increment for packets longer than ctl_tx_max_packet_len with good and bad FCS.
|
stat_tx_fragment[1:0]
|
O
|
clk
|
Increment for packets shorter than ctl_tx_min_packet_len with bad FCS.
|
stat_tx_packet_bad_fcs
|
O
|
clk
|
Increment for packets between 64 and ctl_tx_max_packet_len bytes that have FCS errors.
|
stat_tx_stomped_fcs[2:0]
|
O
|
clk
|
Stomped FCS indicator. The value on this bus indicates packets with a stomped FCS. A stomped FCS is defined as the bitwise inverse of the expected good FCS. This output is pulsed for one clock cycle to indicate the stomped condition. Pulses can occur in back-to-back cycles.
|
stat_tx_remote_fault
|
O
|
clk
|
Remote fault indication status. If this bit is sampled as a 1, it indicates a remote fault condition was detected.
If this bit is sampled as a 0, a remote fault condition does not exist. This output is level sensitive.
|
stat_tx_internal_local_fault
|
O
|
clk
|
This signal goes High when an internal local fault is generated due to any one of the following: test pattern generation, bad lane alignment, or high bit error rate.
This signal remains High as long as the fault condition persists.
|
stat_tx_received_local_fault
|
O
|
clk
|
This signal goes High when enough local fault words are received from the link partner to trigger a fault condition as specified by the IEEE fault state machine.
This signal remains High as long as the fault condition persists.
|
stat_tx_bad_code[2:0]
|
O
|
clk
|
Increment for 64B/66B code violations. This signal indicates that the RX PCS receive state machine is in the RX_E state as specified by the IEEE Std 802.3. This output can be used to generate MDIO register 3.33:7:0 as defined in Clause 82.3.
|
stat_tx_test_pattern_mismatch[2:0]
|
O
|
clk
|
Test pattern mismatch increment. A non-zero value in any cycle indicates how many mismatches occurred for the test pattern in the TX core. This output is only active when ctl_tx_test_pattern is set to a 1. This output can be used to generate MDIO register 3.43.15:0 as defined in Clause 82.3. This output is pulsed for one clock cycle.
|
stat_tx_bad_preamble
|
O
|
clk
|
Increment bad preamble. This signal indicates if the Ethernet packet was preceded by a valid preamble. A value of 1 indicates that an invalid preamble was on the egress.
|
stat_tx_bad_sfd
|
O
|
clk
|
Increment bad SFD. This signal indicates if the Ethernet packet was preceded by a valid SFD. A value of 1 indicates that an invalid SFD was on the egress.
|
stat_tx_got_signal_os
|
O
|
clk
|
Signal OS indication. If this bit is sampled as a 1, it indicates that a signal OS word was on the egress.
Note:
Signal OS should not be received in an Ethernet network.
|
stat_tx_rsfec_block_lock
|
O
|
clk
|
Block lock status for each PCS lane. A value of 1 indicates that the corresponding lane has achieved block lock as defined in Clause 82. Corresponds to MDIO register bit 3.50.7:0 and 3.51.11:0 as defined in Clause 82.3. This output is level sensitive.
|
stat_tx_rsfec_am_lock
|
O
|
clk
|
Indicates if the RS-FEC TX lane <n> is locked and aligned.
|
stat_tx_rsfec_lane_alignment_status
|
O
|
clk
|
Indicates if all the RS-FEC TX lanes are locked and aligned.
|