RS-FEC Enabled Configuration Simulation - 3.1 English

UltraScale+ Devices Integrated 100G Ethernet Subsystem Product Guide (PG203)

Document ID
PG203
Release Date
2022-11-02
Version
3.1 English

For faster simulation, apply SIM_SPEED_UP and deselect the Use Precompiled IP simulation libraries checkbox in the Settings window, as shown in the following figures. If this is not done, the simulation can run for a long time, timing out with an error.

Figure 5-25: SIM_SPEED_UP Enabled

X-Ref Target - Figure 5-25

RSFEC_sim_setting_1.png
Figure 5-26: Use Precompiled IP Simulation Libraries Disabled

X-Ref Target - Figure 5-26

RSFEC_sim_setting_2.png