RX CLK - 3.1 English

UltraScale+ Devices Integrated 100G Ethernet Subsystem Product Guide (PG203)

Document ID
PG203
Release Date
2022-11-02
Version
3.1 English

This clock is provided to the CMAC block. The clock must be 322.266 MHz for both CAUI-10, CAUI-4, 100GAUI-4, and 100GAUI-2 operation, and must be the same as TX_CLK . This clock is used in the receive Ethernet MAC, LBUS/AXIS interface, and the Control/Status port.