The 100G Ethernet IP core provides status bits to indicate the state of word boundary synchronization and PCS lane alignment. All signals are synchronous with the rising-edge of RX_CLK. A detailed description of each signal follows.
The 100G Ethernet IP core provides status bits to indicate the state of word boundary synchronization and PCS lane alignment. All signals are synchronous with the rising-edge of RX_CLK. A detailed description of each signal follows.