Sub-Mode 2: Error Indication, No Error Correction - 3.1 English

UltraScale+ Devices Integrated 100G Ethernet Subsystem Product Guide (PG203)

Document ID
PG203
Release Date
2022-11-02
Version
3.1 English

In this sub-mode, the RS-FEC engine detects errors but does not attempt to correct them.

If a codeword with no errors is received, the data is passed to the Integrated 100G Ethernet.

If a codeword with one or more errors is received, the erroneous data is passed to the Integrated 100G Ethernet with some of the 2-bit synchronization headers corrupted within the 66b/64b encoded stream. This causes the Integrated 100G Ethernet to discard any data packets that are wholly or partially contained within the affected codeword.

Note: If the ctl_rsfec_ieee_error_indication_mode control flag is High, an attempt to disable both error indication and error correction will result in this sub-mode in which error indication is not disabled. This is the behavior required by IEEE 802.3bj Clause 91. In order to disable error indication and error correction simultaneously (that is, to enter sub-mode 3), the IEEE error indication mode must be set to 0.