Sub-Mode 3: No Error Indication Or Error Correction (Non-Standard) - 3.1 English

UltraScale+ Devices Integrated 100G Ethernet Subsystem Product Guide (PG203)

Document ID
PG203
Release Date
2022-11-02
Version
3.1 English

In this sub-mode, the RS-FEC engine detects errors but does not attempt to correct them.

If a codeword with no errors is received, the data is passed to the Integrated 100G Ethernet.

If a codeword with one or more errors is received, the erroneous data is also passed to the Integrated 100G Ethernet with no indication that it is incorrect.

To reduce the chance that errors in a packet are undetected, the RS-FEC engine performs additional error monitoring in this mode. The number of symbol errors seen is accumulated over consecutive non-overlapping windows of input codewords. If the symbol error count within any window exceeds a fixed threshold, the RS-FEC engine sets its hi_ser flag to True and causes the data being passed to the Integrated 100G Ethernet to have all of its 2-bit synchronization headers corrupted for a long period (>60ms). This causes the Integrated 100G Ethernet to set its hi_ber flag to true, inhibiting the processing of received packets.

This sub-mode is a non-standard extension to IEEE 802.3bj.