Transcode Bypass Mode - 3.1 English

UltraScale+ Devices Integrated 100G Ethernet Subsystem Product Guide (PG203)

Document ID
PG203
Release Date
2022-11-02
Version
3.1 English

In transcode bypass mode, the core operates on a transactional basis where individual RS codewords are encoded and decoded directly. Transcoding and alignment operations are not performed. The content of the 5140 payload bits of the RS codeword is not constrained in any way by the implementation, providing full flexibility.

To enable the RS-FEC in transcode bypass mode, set the ctl_rx_rsfec_enable , ctl_tx_rsfec_enable and ctl_rsfec_enable_transcoder_bypass_mode to 1. Set the desired operating sub-mode on the ctl_rsfec_ieee_error_indication_mode , ctl_rx_rsfec_enable_correction and ctl_rx_rsfec_enable_indication inputs. The rx_reset and tx_reset must then be asserted and removed in order to apply the chosen settings.