| Signal | Direction | Clock Domain | Description |
|---|---|---|---|
| ext_tod_bus_sec | I | ts_clk | Free running clock that clocks the system timer's counters |
| ext_tod_bus_ns | I | ts_clk | System timer reset active-High |
| ext_tod_bus_1pps | O | ts_clk | Interrupt asserted on 1PPS event |
| Signal | Direction | Clock Domain | Description |
|---|---|---|---|
| ext_tod_bus_sec | I | ts_clk | Free running clock that clocks the system timer's counters |
| ext_tod_bus_ns | I | ts_clk | System timer reset active-High |
| ext_tod_bus_1pps | O | ts_clk | Interrupt asserted on 1PPS event |