AN and LT Interface Control/Status/Statistics Signals - 3.3 English

40G/50G High Speed Ethernet Subsystem v3.3 Product Guide (PG211)
Document ID
PG211
Release Date
2023-11-01
Version
3.3 English

Ports under this section are available when Include AN/LT Logic is selected from the Configuration tab.

Table 1. AN and LT Interface Control/Status/Statistics Signals
Name Size I/O Description
an_clk_* 1 I Input Clock for the Auto-Negotiation circuit.

This should be a free running clock.
an_reset_* 1 I Asynchronous active-High reset corresponding to an_clk domain.
an_loc_np_data_* 48 I Local Next Page codeword. This is the 48 bit codeword used if the loc_np input is set. In this data field, the bits NP, ACK, & T, bit positions 15, 14, 12, and 11, are not transferred as part of the next page codeword. These bits are generated in the AN IP. However, the Message Protocol bit, MP, in bit position 13, is transferred.
an_lp_np_data_* 48 O Link Partner Next Page Data. This 48 bit word is driven by the AN IP with the 48 bit next page codeword from the remote link partner.
lt_tx_sof_* 4 O This is a link training signal that is asserted for one tx_serdes_clk period at the start of each training frame. It is provided for applications that need to count training frames or synchronize events to the output of the training frames.
ctl_autoneg_enable_* 1 I Enable signal for auto-negotiation.

This port is available when the AXI4-Lite interface is not selected.
ctl_autoneg_bypass_* 1 I Input to disable auto-negotiation and bypass the auto-negotiation function. If this input is asserted, auto-negotiation is turned off, but the PCS is connected to the output to allow operation.

This port is available when the AXI4-Lite interface is not selected.
ctl_an_nonce_seed_* 8 I 8-bit seed to initialize the nonce field polynomial generator.

This port is available when the AXI4-Lite interface is not selected.
ctl_an_pseudo_sel_* 1 I Selects the polynomial generator for the bit 49 random bit generator. If this input is 1, the polynomial is x7+x6+1. If this input is zero, the polynomial is x7+x3+1.

This port is available when the AXI4-Lite interface is not selected.
ctl_restart_negotiation_* 1 I

This input is used to trigger a restart of the auto-negotiation, regardless of what state the circuit is currently in.

This port is available when the AXI4-Lite interface is not selected.
ctl_an_local_fault_* 1 I This input signal is used to set the remote_fault bit of the transmit link codeword.

This port is available when the AXI4-Lite interface is not selected.
ctl_an_pause_* 1 I This input signal is used to set the PAUSE bit, (C0), of the transmit link codeword. This signal might not be present if the core does not support pause.

This port is available when the AXI4-Lite interface is not selected.
ctl_an_asmdir_* 1 I This input signal is used to set the ASMDIR bit, (C1), of the transmit link codeword.

This signal might not be present if the core does not support pause.

This port is available when the AXI4-Lite interface is not selected.
ctl_an_fec_10g_request_* 1 I This signal is used to signal the link partner that the local station is requesting clause 74 FEC on the 10Gb/s lane protocols.

This port is available when the AXI4-Lite interface is not selected.
ctl_an_fec_25g_rs_request_* 1 I This signal is used to signal the link partner that the local station is requesting rs FEC (clause 91 or 108) on the 25Gb/s lane protocols.

This port is available when the AXI4-Lite interface is not selected.
ctl_an_fec_25g_baser_request_* 1 I This signal is used to signal the link partner that the local station is requesting clause 74 FEC on the 25Gb/s lane protocols.

This port is available when the AXI4-Lite interface is not selected.
ctl_an_fec_ability_override_* 1 I Used to set the clause 74 FEC ability bit in the transmit link codeword. If this input is set, the FEC ability bit in the transmit link codeword is cleared. This signal might not be present if the IP core does not support clause 74 FEC.

This port is available when the AXI4-Lite interface is not selected.
ctl_an_loc_np_* 1 I Local Next Page indicator. If this bit is a 1, the AN IP transfers the next page word at input loc_np_data to the remote link partner. If this bit is 0, the AN IP does not initiate the next page protocol. If the link partner has next pages to send and the 'loc_np' bit is clear, the AN IP transfers null message pages.
ctl_an_lp_np_ack_* 1 I Link Partner Next Page Acknowledge. This is used to signal the AN IP that the next page data from the remote link partner at output pin lp_np_data has been read by the local host. When this signal goes High, the AN IP acknowledges reception of the next page codeword to the remote link partner and initiate transfer of the next codeword. During this time, the AN IP removes the lp_np signal until the new next page information is available.
ctl_an_cl91_fec_request_* 1 I This bit is used to request clause 91 FEC.

This port is available when the AXI4-Lite interface is not selected.
ctl_an_cl91_fec_ability_* 1 I This bit is used to set clause 91 FEC ability.

This port is available when the AXI4-Lite interface is not selected.
ctl_an_ability_1000base_kx_* 1 I These inputs identify the Ethernet protocol abilities that are advertised in the transmit link codeword to the link partner. A value of 1 indicates that the interface advertises that it supports the protocol.
ctl_an_ability_10gbase_kx4_* 1 I
ctl_an_ability_10gbase_kr_* 1 I
ctl_an_ability_40gbase_kr4_* 1 I
ctl_an_ability_40gbase_cr4_* 1 I
ctl_an_ability_100gbase_cr10_* 1 I
ctl_an_ability_100gbase_kp4_* 1 I
ctl_an_ability_100gbase_kr4_* 1 I
ctl_an_ability_100gbase_cr4_* 1 I
ctl_an_ability_25gbase_krcr_s_* 1 I
ctl_an_ability_25gbase_krcr_* 1 I
ctl_an_ability_25gbase_kr1_* 1 I
ctl_an_ability_25gbase_cr1_* 1 I
ctl_an_ability_50gbase_kr2_* 1 I
ctl_an_ability_50gbase_cr2_* 1 I
ctl_lt_training_enable_* 1 I Enables link training. When link training is disabled, all PCS lanes function in mission mode.

This port is available when the AXI4-Lite interface is not selected.
ctl_lt_restart_training_* 1 I This signal triggers a restart of link training regardless of the current state.

This port is available when the AXI4-Lite interface is not selected.
ctl_lt_rx_trained_* 4 I This signal is asserted to indicate that the receiver FIR filter coefficients have all been set, and that the receiver portion of training is complete.

This port is available when the AXI4-Lite interface is not selected.
ctl_lt_preset_to_tx_* 4 I This signal is used to set the value of the preset bit that is transmitted to the link partner in the control block of the training frame.

This port is available when the AXI4-Lite interface is not selected.
ctl_lt_initialize_to_tx_* 4 I

This signal is used to set the value of the initialize bit that is transmitted to the link partner in the control block of the training frame.

This port is available when the AXI4-Lite interface is not selected.
ctl_lt_pseudo_seed0_* 11 I This 11- bit signal seeds the training pattern generator.

This port is available when the AXI4-Lite interface is not selected.
ctl_lt_k_p1_to_tx0_* 2 I This 2-bit field is used to set the value of the k+1 coefficient update field that is transmitted to the link partner in the control block of the training frame.

This port is available when the AXI4-Lite interface is not selected.
ctl_lt_k0_to_tx0_* 2 I This 2-bit field is used to set the value of the k0 coefficient update field that is transmitted to the link partner in the control block of the training frame.

This port is available when the AXI4-Lite interface is not selected.
ctl_lt_k_m1_to_tx0_* 2 I This 2-bit field is used to set the value of the k-1 coefficient update field that is transmitted to the link partner in the control block of the training frame.

This port is available when the AXI4-Lite interface is not selected.
ctl_lt_stat_p1_to_tx0_* 2 I This 2-bit field is used to set the value of the k+1 coefficient update status that is transmitted to the link partner in the status block of the training frame.

This port is available when the AXI4-Lite interface is not selected.
ctl_lt_stat0_to_tx0_* 2 I This 2-bit field is used to set the value of the k0 coefficient update status that is transmitted to the link partner in the status block of the training frame.

This port is available when the AXI4-Lite interface is not selected.
ctl_lt_stat_m1_to_tx0_* 2 I This 2-bit field is used to set the value of the k-1 coefficient update status that is transmitted to the link partner in the status block of the training frame.

This port is available when the AXI4-Lite interface is not selected.
ctl_lt_pseudo_seed1_* 11 I This 11- bit signal seeds the training pattern generator.

This port is available when the AXI4-Lite interface is not selected.
ctl_lt_k_p1_to_tx1_* 2 I This 2-bit field is used to set the value of the k+1 coefficient update field that is transmitted to the link partner in the control block of the training frame.

This port is available when the AXI4-Lite interface is not selected.
ctl_lt_k0_to_tx1_* 2 I This 2-bit field is used to set the value of the k0 coefficient update field that is transmitted to the link partner in the control block of the training frame.

This port is available when the AXI4-Lite interface is not selected.
ctl_lt_k_m1_to_tx1_* 2 I This 2-bit field is used to set the value of the k-1 coefficient update field that is transmitted to the link partner in the control block of the training frame.

This port is available when the AXI4-Lite interface is not selected.
ctl_lt_stat_p1_to_tx1_* 2 I This 2-bit field is used to set the value of the k+1 coefficient update status that is transmitted to the link partner in the status block of the training frame.

This port is available when the AXI4-Lite interface is not selected.
ctl_lt_stat0_to_tx1_* 2 I This 2-bit field is used to set the value of the k0 coefficient update status that is transmitted to the link partner in the status block of the training frame.

This port is available when the AXI4-Lite interface is not selected.
ctl_lt_stat_m1_to_tx1_* 2 I This 2-bit field is used to set the value of the k-1 coefficient update status that is transmitted to the link partner in the status block of the training frame.

This port is available when the AXI4-Lite interface is not selected.
ctl_lt_pseudo_seed2_* 11 I This 11- bit signal seeds the training pattern generator.

This port is available when the AXI4-Lite interface is not selected.
ctl_lt_k_p1_to_tx2_* 2 I This 2-bit field is used to set the value of the k+1 coefficient update field that is transmitted to the link partner in the control block of the training frame.

This port is available when the AXI4-Lite interface is not selected.
ctl_lt_k0_to_tx2_* 2 I This 2-bit field is used to set the value of the k0 coefficient update field that is transmitted to the link partner in the control block of the training frame.

This port is available when the AXI4-Lite interface is not selected.
ctl_lt_k_m1_to_tx2_* 2 I This 2-bit field is used to set the value of the k-1 coefficient update field that is transmitted to the link partner in the control block of the training frame.

This port is available when the AXI4-Lite interface is not selected.
ctl_lt_stat_p1_to_tx2_* 2 I This 2-bit field is used to set the value of the k+1 coefficient update status that is transmitted to the link partner in the status block of the training frame.

This port is available when the AXI4-Lite interface is not selected.
ctl_lt_stat0_to_tx2_* 2 I This 2-bit field is used to set the value of the k0 coefficient update status that is transmitted to the link partner in the status block of the training frame.

This port is available when the AXI4-Lite interface is not selected.
ctl_lt_stat_m1_to_tx2_* 2 I This 2-bit field is used to set the value of the k-1 coefficient update status that is transmitted to the link partner in the status block of the training frame.

This port is available when the AXI4-Lite interface is not selected.
ctl_lt_pseudo_seed3_* 11 I This 11- bit signal seeds the training pattern generator.

This port is available when the AXI4-Lite interface is not selected.
ctl_lt_k_p1_to_tx3_* 2 I This 2-bit field is used to set the value of the k+1 coefficient update field that is transmitted to the link partner in the control block of the training frame.

This port is available when the AXI4-Lite interface is not selected.
ctl_lt_k0_to_tx3_* 2 I This 2-bit field is used to set the value of the k0 coefficient update field that is transmitted to the link partner in the control block of the training frame.

This port is available when the AXI4-Lite interface is not selected.
ctl_lt_k_m1_to_tx3_* 2 I This 2-bit field is used to set the value of the k-1 coefficient update field that is transmitted to the link partner in the control block of the training frame.

This port is available when the AXI4-Lite interface is not selected.
ctl_lt_stat_p1_to_tx3_* 2 I This 2-bit field is used to set the value of the k+1 coefficient update status that is transmitted to the link partner in the status block of the training frame.

This port is available when the AXI4-Lite interface is not selected.
ctl_lt_stat0_to_tx3_* 2 I This 2-bit field is used to set the value of the k0 coefficient update status that is transmitted to the link partner in the status block of the training frame.

This port is available when the AXI4-Lite interface is not selected.
ctl_lt_stat_m1_to_tx3_* 2 I This 2-bit field is used to set the value of the k-1 coefficient update status that is transmitted to the link partner in the status block of the training frame.

This port is available when the AXI4-Lite interface is not selected.
stat_an_link_cntl_1000base_kx_* 2 O Link Control outputs from the auto-negotiation controller for the various Ethernet protocols. Settings are as follows:
  • 00: DISABLE; PCS is disconnected
  • 01: SCAN_FOR_CARRIER; RX is connected to PCS
  • 10: Not Used
  • 11: ENABLE; PCS is connected for mission mode
stat_an_link_cntl_10gbase_kx4_* 2 O
stat_an_link_cntl_10gbase_kr_* 2 O
stat_an_link_cntl_40gbase_kr4_* 2 O
stat_an_link_cntl_40gbase_cr4_* 2 O
stat_an_link_cntl_100gbase_cr10_* 2 O
stat_an_link_cntl_100gbase_kp4_* 2 O
stat_an_link_cntl_100gbase_kr4_* 2 O
stat_an_link_cntl_100gbase_cr4_* 2 O
stat_an_link_cntl_25gbase_krcr_s_* 2 O
stat_an_link_cntl_25gbase_krcr_* 2 O
stat_an_link_cntl_25gbase_kr1_* 2 O
stat_an_link_cntl_25gbase_cr1_*    
stat_an_link_cntl_50gbase_kr2_*    
stat_an_link_cntl_50gbase_cr2_*    
stat_an_fec_enable_* 1 O Used to enable the use of clause 74 FEC on the link.
stat_an_tx_pause_enable_* 1 O Used to enable station-to-station (global) pause packet generation in the transmit path to control data flow in the receive path.
stat_an_rx_pause_enable_* 1 O Used to enable station-to-station (global) pause packet interpretation in the receive path, in order to control data flow from the transmitter.
stat_an_autoneg_complete_* 1 O Indicates the auto-negotiation is complete and rx link status from the PCS has been received.
stat_an_parallel_detection_fault_* 1 O Indicates a parallel detection fault during auto-negotiation.
stat_an_start_tx_disable_* 1 O

This signal is asserted during

auto-negotiation for one AN_CLK period to signal the start of the TX_DISABLE phase at the very start of auto-negotiation.
stat_an_start_an_good_check_* 1 O This signal is asserted during

auto-negotiation for one AN_CLK period to signal the start of the AN_GOOD_CHECK phase, when the selected protocol has been enabled, and the circuit is awaiting rx_pcs_status.
stat_an_lp_ability_1000base_kx_* 1 O These signals indicate the advertised protocol from the link partner. They all become valid when the output signal stat_an_lp_ability_valid is asserted. A value of 1 indicates that the protocol is advertised as supported by the link partner.
stat_an_lp_ability_10gbase_kx4_* 1 O
stat_an_lp_ability_10gbase_kr_* 1 O
stat_an_lp_ability_40gbase_kr4_* 1 O
stat_an_lp_ability_40gbase_cr4_* 1 O
stat_an_lp_ability_100gbase_cr10_* 1 O
stat_an_lp_ability_100gbase_kp4_* 1 O
stat_an_lp_ability_100gbase_kr4_* 1 O
stat_an_lp_ability_100gbase_cr4_* 1 O
stat_an_lp_ability_25gbase_krcr_s_* 1 O
stat_an_lp_ability_25gbase_krcr_* 1 O
stat_an_lp_pause_* 1 O This signal indicates the advertised value of the PAUSE bit, (C0), in the receive link codeword from the link partner. It becomes valid when the output signal stat_an_lp_ability_valid is asserted.
stat_an_lp_asm_dir_* 1 O This signal indicates the advertised value of the ASMDIR bit, (C1), in the receive link codeword from the link partner. It becomes valid when the output signal stat_an_lp_ability_valid is asserted.
stat_an_lp_rf_* 1 O This bit indicates link partner remote fault.
stat_an_lp_fec_10g_ability_* 1 O This signal indicates the clause 74 FEC ability associated with 10 Gb/s lane protocols that is being advertised by the link partner. It becomes valid when the output signal stat_an_lp_ability_valid is asserted.
stat_an_lp_fec_10g_request_* 1 O This signal indicates that the link partner is requesting that the clause 74 FEC be used on the 10 Gb/s lane protocols.It becomes valid when the output signal stat_an_lp_ability_valid is asserted.
stat_an_lp_fec_25g_rs_request_* 1 O This signal indicates that the link partner is requesting the clause 91 (or 108) rs FEC be used for the 25 Gb/s lane protocols. It becomes valid when the output signal stat_an_lp_ability_valid is asserted.
stat_an_lp_fec_25g_baser_request_* 1 O This signal indicates that the link partner is requesting the clause 74 FEC be used for the 25 Gb/s lane base-r protocols. It becomes valid when the output signal stat_an_lp_ability_valid is asserted.
stat_an_lp_autoneg_able_* 1 O This output signal indicates that the link partner is able to perform auto-negotiation. It becomes valid when the output signal stat_an_lp_ability_valid is asserted.
stat_an_lp_ability_valid_* 1 O This signal indicates when all of the link partner advertisements become valid.
stat_an_loc_np_ack_* 1 O This signal is used to indicate to the local host that the local next page data, presented at input pin loc_np_data, has been taken. This signal pulses High for 1 clock period when the AN IP samples the next page data on input pin oc_np_data. When the local host detects this signal High, it must replace the 48 bit next page codeword at input pin loc_np_data with the next 48-bit codeword to be sent. If the local host has no more next pages to send, it must clear the loc_np input.
stat_an_lp_np_* 1 O Link Partner Next Page. This signal is used to indicate that there is a valid 48-bit next page codeword from the remote link partner at output pin lp_np_data. This signal is driven Low when the lp_np_ack input signal is driven High, indicating that the local host has read the next page data. It remains Low until the next codeword becomes available on the lp_np_data output pin; the lp_np output is driven High again.
stat_an_lp_ability_25gbase_kr1_* 1 O Indicates the advertised protocol from the link partner. Becomes valid when the output signal stat_an_lp_extended_ability_valid is asserted. A value of 1 indicates that the protocol is advertised as supported by the link partner.
stat_an_link_cntl_25gbase_cr1_* 1 O Indicates the advertised protocol from the link partner. Becomes valid when the output signal stat_an_lp_extended_ability_valid is asserted. A value of 1 indicates that the protocol is advertised as supported by the link partner.
stat_an_lp_ability_50gbase_kr2_* 1 O Indicates the advertised protocol from the link partner. Becomes valid when the output signal stat_an_lp_extended_ability_valid is asserted. A value of 1 indicates that the protocol is advertised as supported by the link partner.
stat_an_lp_ability_50gbase_cr2_* 1 O Indicates the advertised protocol from the link partner. Becomes valid when the output signal stat_an_lp_extended_ability_valid is asserted. A value of 1 indicates that the protocol is advertised as supported by the link partner.
stat_an_lp_ability_extended_fec_* 4 O This output indicates the extended FEC abilities.
stat_an_rs_fec_enable_* 1 O Used to enable the use of clause 91 FEC on the link.
stat_an_lp_extended_ability_valid_* 1 O When this bit is 1, it indicates that the detected extended abilities are valid.
stat_lt_signal_detect_* 4 O This signal indicates when the respective link training state machine has entered the SEND_DATA state, in which normal PCS operation can resume.
stat_lt_training_* 4 O This signal indicates when the respective link training state machine is performing link training.
stat_lt_training_fail_* 4 O This signal is asserted during link training if the corresponding link training state machine detects a time-out during the training period.
stat_lt_rx_sof_* 4 O This output is High for 1 RX SerDes clock cycle to indicate the start of the link training frame.
stat_lt_frame_lock_* 4 O When link training has begun, these signals are asserted, for each PMD lane, when the corresponding link training receiver is able to establish a frame synchronization with the link partner.
stat_lt_preset_from_rx_* 4 O This signal reflects the value of the preset control bit received in the control block from the link partner.
stat_lt_initialize_from_rx_* 4 O This signal reflects the value of the initialize control bit received in the control block from the link partner.
stat_lt_k_p1_from_rx0_* 2 O This 2-bit field indicates the update control bits for the k+1 coefficient, as received from the link partner in the control block.
stat_lt_k0_from_rx0_* 2 O This 2-bit field indicates the update control bits for the k0 coefficient, as received from the link partner in the control block.
stat_lt_k_m1_from_rx0_* 2 O This 2-bit field indicates the update control bits for the k-1 coefficient, as received from the link partner in the control block.
stat_lt_stat_p1_from_rx0_* 2 O This 2-bit field indicates the update status bits for the k+1 coefficient, as received from the link partner in the status block.
stat_lt_stat0_from_rx0_* 2 O This 2-bit fields indicates the update status bits for the k0 coefficient, as received from the link partner in the status block.
stat_lt_stat_m1_from_rx0_* 2 O This 2-bit field indicates the update status bits for the k-1 coefficient, as received from the link partner in the status block.
stat_lt_k_p1_from_rx1_* 2 O This 2-bit field indicates the update control bits for the k+1 coefficient, as received from the link partner in the control block.
stat_lt_k0_from_rx1_* 2 O This 2-bit field indicates the update control bits for the k0 coefficient, as received from the link partner in the control block.
stat_lt_k_m1_from_rx1_* 2 O This 2-bit field indicates the update control bits for the k-1 coefficient, as received from the link partner in the control block.
stat_lt_stat_p1_from_rx1_* 2 O This 2-bit field indicates the update status bits for the k+1 coefficient, as received from the link partner in the status block.
stat_lt_stat0_from_rx1_* 2 O This 2-bit fields indicates the update status bits for the k0 coefficient, as received from the link partner in the status block.
stat_lt_stat_m1_from_rx1_* 2 O This 2-bit field indicates the update status bits for the k-1 coefficient, as received from the link partner in the status block.
stat_lt_k_p1_from_rx2_* 2 O This 2-bit field indicates the update control bits for the k+1 coefficient, as received from the link partner in the control block.
stat_lt_k0_from_rx2_* 2 O This 2-bit field indicates the update control bits for the k0 coefficient, as received from the link partner in the control block.
stat_lt_k_m1_from_rx2_* 2 O This 2-bit field indicates the update control bits for the k-1 coefficient, as received from the link partner in the control block.
stat_lt_stat_p1_from_rx2_* 2 O This 2-bit field indicates the update status bits for the k+1 coefficient, as received from the link partner in the status block.
stat_lt_stat0_from_rx2_* 2 O This 2-bit fields indicates the update status bits for the k0 coefficient, as received from the link partner in the status block.
stat_lt_stat_m1_from_rx2_* 2 O This 2-bit field indicates the update status bits for the k-1 coefficient, as received from the link partner in the status block.
stat_lt_k_p1_from_rx3_* 2 O This 2-bit field indicates the update control bits for the k+1 coefficient, as received from the link partner in the control block.
stat_lt_k0_from_rx3_* 2 O This 2-bit field indicates the update control bits for the k0 coefficient, as received from the link partner in the control block.
stat_lt_k_m1_from_rx3_* 2 O This 2-bit field indicates the update control bits for the k-1 coefficient, as received from the link partner in the control block.
stat_lt_stat_p1_from_rx3_* 2 O This 2-bit field indicates the update status bits for the k+1 coefficient, as received from the link partner in the status block.
stat_lt_stat0_from_rx3_* 2 O This 2-bit fields indicates the update status bits for the k0 coefficient, as received from the link partner in the status block.
stat_lt_stat_m1_from_rx3_* 2 O This 2-bit field indicates the update status bits for the k-1 coefficient, as received from the link partner in the status block.
stat_an_rxcdrhold_* 1 O Indicates the rx cdr hold signal.